Comparison of Three Different 2-D Space Vector PWM Algorithms and Their FPGA Implementations

Bishuang Fan, Guanzheng Tan, Shaosheng Fan

Abstract


To improve the flexibility of the multilevel space vector pulse width modulation (SVPWM), different algorithms have been developed. A theoretical comparison is made for three 2-D SVPWM algorithms: they are 60° g-h coordinate SVPWM (60° SVPWM), 45° rotating coordinate SVPWM (45° SVPWM) and multilevel SVPWM based on two-level algorithm (SVPWM based on two-level). The aim is to provide a guideline for the selection of the most appropriate SVPWM technique for digital implementation. Among them, the 45° SVPWM offers the best flexibility with the least calculation and is well suited for digital implementation. The SVPWM based on two-level is most intuitionistic but with largest calculation. New general methods of the 60° and 45° algorithms for any level SVPWM are also provided, which needs only the angle θ and the modulation depth m to generate and arrange the final vector sequence. All three methods are implemented in a field programmable gate array (FPGA) with very high speed integrated circuit hardware description language (VHDL) and compared in terms of implementation complexity and logic resources required. Simulation results show the absolute advantages of 45° SVPWM in briefness and resources use. Finally, an experimental test result is presented with a three-level neutral-point-clamped (NPC) inverter.


Keywords


Space vector pulse width modulation (SVPWM), field programmable gate array (FPGA), 60° g-h coordinate, 45° rotating coordiante, multilevel inverter

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References


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